This invention relates to a method of controlling a flash memory. It also relates to a flash memory system and a flash memory device using such a control method.
Hard disk devices are popularly used as computer memory devices that are available at low cost relative to the memory capacity they provide. In many hard disks, file data are written and read out on a unit by unit basis and the unit is referred to as sector (e.g., 512 bytes).
Hard disks can give rise to errors due to a scar and/or particles of dirt that make it no longer possible to carry out the normal operation of writing data into or retrieving data from a sector. However, such errors can be detected and corrected by adding an annex data referred to as error check code to each file data. With the use of an error check code, the presence or absence of an error in a file data can be detected by using the file data and the error check code. If there is an error, then it can be corrected.
In many file management systems that are used for computers, a larger unit is formed by a plurality of sectors so that file data are mostly controlled on a cluster basis on the computer.
A hard disk consumes electric power at a relatively high rate for driving its motor. Additionally, vibrations generated by the motor can damage the disk and hence its reliability. Flash memories are introduced to bypass this problem. A flash memory consumes power at a lower rate and can withstand vibrations. Additionally, it does not require a power back up system comprising batteries. Thus, flash memories are popularly used in portable electronic equipment.
As far as this patent application is concerned, a memory device using a flash memory is referred to as flash memory system. In many instances, a flash memory is designed to operate just like a hard disk from the viewpoint of computer.
In other words, a flash memory system is operated in such a manner that a hard disk driver is driven for operation. This is because it is a great advantage for any computers to be able to access a hard disk and a flash memory without discrimination.
To do this, the computer is required to be able to write data into and read data from a flash memory on a sector basis. In other words, a flash memory is required to be provided with a data register that can temporarily store data by a volume to be collectively stored in a sector. Then, a volume of data to be written into and read from a sector will be collectively handled by the computer. This technique is well known and a system adapted to collectively write data into and read data from a sector can operate at high speed.
NAND type flash memories are known to be particularly adapted to the above technique. With an NAND type flash memory, for instance, data can be collectively written into and read from a sector by 528 bytes and four sectors may form a cluster. Then, data can be collectively erased on a cluster by cluster basis.
When the data stored in a cluster are erased in a flash memory system comprising an NAND type flash memory, the computer checks if all the data in the memory cells of the cluster have been erased or not (an operation including VERIFY/ERASE). If there is a memory cell in the cluster where a data has not been erased and remains there, the cluster is deemed as faulty and the cluster is disabled.
Similarly, when data are written into a sector, the computer checks if data are written correctly into all the memory cells or not (an operation including VERIFY/WRITE). If there is a memory cell in the sector where a data cannot be written, the sector is deemed as faulty and the cluster containing the sector is disabled.
Redundant clusters are provided in order to replace disabled clusters. When the number of disabled clusters exceeds a given level, it is no longer possible to replace a disabled cluster and the entire flash memory becomes faulty.
Multi-valued NAND type flash memories where a plurality of threshold voltages, e.g., four threshold voltages, are provided for each memory cell and a 2-bit data is written there are known. Such flash memories require a rigorous control of threshold voltage values far more than any ordinary NAND type flash memories. Thus, such flash memories can show a higher rate of appearance of faulty memory cells than any ordinary NAND type flash memories because their data retaining performance can often degrade.
In view of this problem, flash memory systems comprising a multi-valued NAND type flash memory are required to reliably detect and correct errors. When the data stored in a cluster are erased in such a flash memory system, the computer also checks if all the data in the memory cells of the cluster have been erased or not (an operation including VERIFY/ERASE). If there is a memory cell in the cluster where a data has not been erased and remains there, the cluster is deemed as faulty and the cluster is disabled.
Similarly, when data are written into a sector, the computer checks if data are written correctly into all the memory cells or not (an operation including VERIFY/WRITE). If there is a memory cell in the sector where a data cannot be written, the sector is deemed as faulty and the cluster containing the sector is disabled.
As described above, because of the provision of error check codes that are annexed to data in a system where a plurality of memory cells can be checked for error detection and error correction, only a single faulty memory cell disables the entire cluster for any operation of erasing and writing data before the system operates in an error detection/correction mode.
In other words, while the memory system may be relieved of a faulty condition, it can often give rise to a faulty sector or a faulty cluster and consequently a large disabled memory area that can leads to a system fault.
In view of the above identified circumstances, it is therefore the object of the present invention to provide a flash memory system that can correct errors in such a way that any unnecessary expansion of disabled memory areas is effectively prevented.